自制版本的《UVM Cookbook》（2013）：详细书签版和练习代码，附带UVM查询手册。.zip文件

简介：
Table of Contents Articles Introduction 0 CookbookIntroduction 0 CookbookAcknowledgements 1 Testbench Architecture 2 Testbench 2 TestbenchBuild 9 TestbenchBlocklevel 19 TestbenchIntegrationLevel 29 Component 39 Agent 42 Phasing 48 Factory 53 UsingFactoryOverrides 56 SystemVerilogPackages 62 Connections to DUT Interfaces 65 Connections 65 SVCreationOrder 71 ConnectSystemVerilogTechniques 73 ParameterizedTests 75 ConnectVirtual Interface 78 ConfigVirtInterfaceConfigDb 86 ConnectVirtInterfacePackage 90 ConnectVirtInterfaceConfigPkg 93 ConnectTwoKingdomsFactory 97 DualTop 103 VirtInterfaceFunctionCallChain 106 BusFunctionalModels 108 ProtocolModules 111 ConnectAbstractConcrete 115 ConnectAbstractConcreteConfigDB 118 Configuring a Test Environment 126 Configuration 126 Resourcesconfig db 131 ConfigParams Package 134 ConfigConfiguringSequences 139 ResourceAccessForSequences 142 MacroCostBenefit 145 Analysis Components & Techniques 146 Analysis 146 AnalysisPort 149 AnalysisConnections 152 MonitorComponent 158 Predictors 161 Scoreboards 163 MetricAnalyzers 170 PostRunPhases 172 MatlabIntegration 175 End Of Test Mechanisms 183 EndOfTest 183 Objections 185 Sequences 188 Sequences 188 SequencesItems 193 TransactionMethods 195 SequencesAPI 200 ConnectSequencer 204 DriverSequence API 206 SequencesGeneration 213 SequencesOverrides 221 SequencesVirtual 223 SequencesVirtualSequencer 231 SequencesHierarchy 237 SequencesSequenceLibrary 242 DriverUse Models 246 DriverUnidirectional 247 DriverBidirectional 250 DriverPipelined 255 SequencesArbitration 267 SequencesPriority 276 SequencesLockGrab 277 SequencesSlave 284 StimulusSignal Wait 290 StimulusInterrupts 294 SequencesStopping 301 SequencesLayering 302 Register Abstraction Layer 308 Registers 308 RegistersSpecification 315 RegistersAdapter 317 RegistersIntegrating 321 RegistersIntegration 327 RegistersRegisterModelOverview 332 RegistersModelStructure 334 RegistersQuirkyRegisters 344 RegistersModelCoverage 349 RegistersBackdoorAccess 354 RegistersGeneration 357 RegistersStimulusAbstraction 358 RegistersMemoryStimulus 370 RegistersSequenceExamples 375 RegistersBuiltInSequences 382 RegistersConfiguration 386 RegistersScoreboarding 389 RegistersFunctionalCoverage 395 Testbench Acceleration through Co-Emulation 401 Emulation 401 EmulationSeparateTopLevels 404 EmulationSplitTransactors 410 EmulationBackPointers 415 EmulationDefiningAPI 419 EmulationExample 422 EmulationExampleAPBDriver 430 EmulationExampleSPIAgent 435 EmulationExampleTopLevel 441 Debug of SV and UVM 444 BuiltInDebug 444 ReportingVerbosity 455 UVMCommandLineProcessor 460 UVM Connect - SV-SystemC interoperability 464 UvmConnect 464 UvmConnectConnections 466 UvmConnectConversion 468 UvmConnectCommandAPI 472 UVM Express - step by step improvement 476 UvmExpress 476 UvmExpressDUT 481 UvmExpressBFM 485 UvmExpressWritingBfmTests 490 UvmExpressFunctionalCoverage 498 UvmExpressConstrainedRandom 503 Appendix - Deployment 516 OVM2UVM 516 OVM2UVMDeprecatedCode 527 OVM2UVMSequenceLibrary 528 OVM2UVMPhasing 530 OVM2UVMConvertPhaseMethods 535 UVCUvmVerificationComponent 537 PackageOrganization 548 Appendix - Coding Guidelines 555 SVGuidelines 555 UVMGuidelines 569 Appendix - Glossary of Terms 579 DocGlossary 579